The Efficient Adaptive Pre-Encoded Multipliers Based on (NR4SD) Encoding for Digital Signal Processing Applications

Guggilla.Satya Sudha, Chintha.Sri Pothu Raju


Multimedia and Digital Signal Processing (DSP) applications (e.g., Fast Fourier Transform (FFT), audio/video CoDecs) complete countless with coefficients that don't change amid the execution of the application. Since the multiplier is an essential part to implement computationally concentrated applications, its engineering truly influences their execution. A committed encoding circuit is required and the fractional items age is more mind boggling. A strategy practically identical is proposed for sketching out compelling MB multipliers for social occasions of pre-chosen coefficients with a comparable imperative. Encode the coefficients disengaged in perspective of the MB encoding and store the MB encoded coefficients (i.e., 3 bits for each digit) into a ROM. New layouts of pre-encoded multipliers are researched by detached encoding the standard coefficients and securing them in system memory. We propose encoding these coefficients in the Non-Redundant radix-4 Signed-Digit (NR4SD) outline. The proposed pre-encoded NR4SD multiplier designs are a more area and power compelling stood out from the conventional and pre-encoded MB diagrams


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