Analysis Of Seven Level Asymmetric Cascaded H-Bridge Inverter

M. Manga Lakshmi, G.D.Sairam Vihari, T.Venkata Parasuram

Abstract


The cascaded multilevel inverter (CMLI) has gained much attention in recent years due to its advantages in high voltage and high power with low harmonics applications. A standard cascaded multilevel inverter requires n DC sources for 2n+1levels at the output, where ‘n’ is the number of inverter stages. This project presents a topology to control cascaded multilevel inverter that is implemented with multiple DC sources to get 2n+1-1 levels. Without using Pulse Width Modulation (PWM) technique, the firing circuit can be implemented using Microcontroller which greatly reduces the Total Harmonic Distortion (THD) and switching losses. The model of a cascaded hybrid multilevel inverter is developed with software simulation using MATLAB/SIMULINK software.


References


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