On Fault Free Response Analysis For BIST

Yogesh Singh, Shafiqul Abidin


High levels of coverage of classical and non-classical faults require deterministic test sequences. In this paper, it is suggested that the deterministic test sequences be ordered in such a way that the fault-free output response is a trivial one that can be generated by simple on-chip circuitry, thereby obviating the need for test response compression.


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